		The Apple ][ Mainboard
		~~~~~~~~~~~~~~~~~~~~~~

This text describes the Apple ][ and ][+ mainboards. These were manufactured
from 1974-1984. Since 1984, the Apple ][+ is replaced with the Apple //e, which
has a totally new designed mainboard. But some of the topics are valid for
the Apple //e too (cassette, game port, slots).

1. Differnces between mainboards
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

There are several revisions of the Apple ][ mainboard:

	Revision number		Part number
-----------------------------------------------------------------
	Rev. 0			820-0001-00

	Rev. 1 - Rev. 6		820-0001-0X where X is 1 to 6

	Rev. 7 and higher	820-0001-XX where XX is 07 and higher

	RFI			820-0044-01, 820-0044-C and 820-0044-D

The Rev. 0 board does only have 4 hires colors.
Rev. 1 to 6 don't have great differences. They have ram-jumpers to
configure ram with 4kbit and 16kbit chips.
Rev. 7 is a new design and doesn't have the ram-jumpers. It can only
use 16kBit chips. The character generator has changed too.
The RFI boards were Apple Inc.'s attempt to reduce the radio interference
generated by the Apple. These machines have a newly designed case too.

The part number can be found at the left border of the board or under the
6502 CPU.

2. Connectors
~~~~~~~~~~~~~

2.1. Cassette
~~~~~~~~~~~~~

Two earphone-jacks at the rear of the main board are labelled CASS IN and
CASS OUT. Older (and simple) cassette recorders work better. With a tape deck,
you need to reduce bass, raise tremble and loudness (often ridiculously).

	$C060: read cassette in
	$C020: toggle cassette out

2.2. Composite Video Out
~~~~~~~~~~~~~~~~~~~~~~~~

Beside the Cassette jacks is a third jack for the monitor. It provides a
normal FBAS signal for NTSC monitors.
On the mainboard, just below the monitor jack, is a 4 pin auxilary connector:
	pin 1	+12V
	pin 2	-5V
	pin 3	video out
	pin 4	GND
Below the auxilary video connector is the auxilary video pin and below this 
pin is the video level adjust.

2.3. Keyboard connector
~~~~~~~~~~~~~~~~~~~~~~~

At the front of the mainboard, right in the middle, besides the bigger 24pin
character rom is a empty 16 pin socket. A flat ribbon cable goes from there
to the keyboard.

		+-----_-----+
	    +5V ! 1      16 ! NC
	 STROBE ! 2      15 ! -12V
	  RESET ! 3      14 ! NC
	     NC ! 4      13 ! D1
	     D5 ! 5      12 ! D0
	     D4 ! 6      11 ! D3
	     D6 ! 7      10 ! D2
	    GND ! 8       9 ! NC
		+-----------+

A character is transfered from the keyboard to the Apple ][ by giving the
ascii representation of the character on D0-D6 and raising the strobe
from low to high for at least 1 us.

A character is read from $C000. It is a valid character, if the high bit
is set. The high bit is cleared (until STROBE indicates the next keypress),
if $C010 is accessed.
	

2.4. Game connector
~~~~~~~~~~~~~~~~~~~

In the upper right corner, just below the earphone jacks is a second empty
16 pin socket. It is usually used for the paddles or a joystick.
But it can more! It has 4 TTL outputs, 1 TTL strobe, 3 TTL inputs and
4 paddle inputs.

		+-----_-----+
	    +5V ! 1      16 ! NC
	    SW0 ! 2      15 ! AN0
	    SW1 ! 3      14 ! AN1
	    SW2 ! 4      13 ! AN2
	    STB ! 5      12 ! AN3
	   PDL0 ! 6      11 ! PDL3
	   PDL2 ! 7      10 ! PDL1
	    GND ! 8       9 ! NC
		+-----------+

STB is a strobe. It goes low for 489 ns, if $C040 is accessed.
The annunciators (An0-AN3) are TTL outputs. they are switched by:
	$C058	AN0 off
	$C059	AN0 on
	$C05A	AN1 off
	$C05B	AN1 on
	$C05C	AN2 off
	$C05D	AN2 on
	$C05E	AN3 off
	$C05F	AN3 on
SW0-SW2 can be read from the high bit of the locations $C061, $C062 and $C063.
$C060 is used for the cassette input.
The paddles should be read via the monitor routine and not directly.
The mechanism is as follows: If $C070 is accessed, four condensators
are charged with +5V. They uncharge thru the resistors in the paddles. If the
charge drops below a certain value (+1.5V), the high bit of the paddle location
goes from low to high. This time can be varied by trimming the resistor
(turning the paddle knob).
	$C064	pdl0
	$C065	pdl1
	$C066	pdl2
	$C067	pdl3

2.5. Slot connector
~~~~~~~~~~~~~~~~~~~

The Apple ][ has eight 50 pin slots near the rear of the main board. These are
numbered from 0 to 7 from left to right.

The following cards can usually be found in these slots:
	Slot 0	16kB Language card*, APPLESOFT or Integer ROM card
	Slot 1	Parallel printer card*, Serial card (conn. with the printer*)
	Slot 2	Serial Card (connected with a modem*)
	Slot 3	80 Column card*, Serial Card (connected with a terminal*)
	Slot 4	RAM card (for example Saturn), Z80 Softcard
	Slot 5	RAM card, Z80 Softcard, Disk ][ controller card*
	Slot 6	Disk ][ Controller card*
	Slot 7	RGB card, hard disk controller card, Z80 Softcard, Clock card
This assignment can be varied, but CP/M and UCSD-Pascal assume the cards
marked with an asterik in these slots.

		+-----------+
	    GND ! 26     25 ! +5V
	 DMA IN ! 27     24 ! DMA OUT
	 INT IN ! 28     23 ! INT OUT
	    NMI ! 29     22 ! DMA
	    IRQ ! 30     21 ! RDY
	    RES ! 31     20 ! I/O STB
	    INH ! 32     19 ! SYNC
	   -12V ! 33     18 ! R/W
	    -5V ! 34     17 ! A15
	COL.REF ! 35     16 ! A14
	     7M ! 36     15 ! A13
	     Q3 ! 37     14 ! A12
	   Phi1 ! 38     13 ! A11
	  USER1 ! 39     12 ! A10
	   Phi0 ! 40     11 ! A9
	DEV.SEL ! 41     10 ! A8
	     D7 ! 42      9 ! A7
	     D6 ! 43      8 ! A6
	     D5 ! 44      7 ! A5
	     D4 ! 45      6 ! A4
	     D3 ! 46      5 ! A3
	     D2 ! 47      4 ! A2
	     D1 ! 48      3 ! A1
	     D0 ! 49      2 ! A0
	   +12V ! 50      1 ! I/O SEL
		+-----------+

I/O SEL		active low, if $CNXX is accessed (N: slotnumber). 
A0-A15		address bus
R/W		high read, low write
SYNC		video sync signal (slot 7 only)
I/O STB		active low, if $C800-$CFFF is accessed.
RDY		inserts wait-states
INT OUT		daisy chained interrupt out
DMA OUT		daisy chained dma out
+5V		max. 500mA
GND		common ground
DMA IN		daisy chained dma in
INT IN		daisy chained interrupt in
NMI		active low non maskerable interrupt
IRQ		active low maskerable interrupt
RESET		active low reset
INH		active low disables rom ($D000-$FFFF)
-12V		max. 50mA
-5V		max. 50mA
COL.REF		3.5 MHz color reference (slot 7 only)
7M		7 MHz clock
Q3		2 MHz clock
Phi1		1 MHz clock
USER1		active low disables $C000-$C7FF (jumper)
Phi0		1 MHz clock (complement of Phi1)
DEV.SEL		active low, if $C0X0-$C0XF is accessed (X: slotnumber+8)
D0-D7		data bus
+12V		max. 250mA
